dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 148

• Manufacturer Part Number: dspic33fj128gp204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 9-5:
DS70292C-page 146
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-11
bit 10-8
bit 7
bit 6-0
ASRCSEL
R/W-0
U-0
—
Unimplemented: Read as ‘0’
SELACLK: Select Auxiliary Clock Source for Auxiliary Clock Divider
1 = Auxiliary Oscillators provides the source clock for Auxiliary Clock Divider
0 = PLL output (Fvco) provides the source clock for the Auxiliary Clock Divider
AOSCMD<1:0>: Auxiliary Oscillator Mode
11 = EC External Clock Mode Select
10 = XT Oscillator Mode Select
01 = HS Oscillator Mode Select
00 = Auxiliary Oscillator Disabled
APSTSCLR<2:0>: Auxiliary Clock Output Divider
111 = divided by 1
110 = divided by 2
101 = divided by 4
100 = divided by 8
011 = divided by 16
010 = divided by 32
001 = divided by 64
000 = divided by 256 (default)
ASRCSEL: Select Reference Clock Source for Auxiliary Clock
1 = Primary Oscillator is the Clock Source
0 = Auxiliary Oscillator is the Clock Source
Unimplemented: Read as ‘0’
U-0
U-0
—
—
ACLKCON: AUXILIARY CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
SELACLK
R/W-0
U-0
—
R/W-0
U-0
Preliminary
—
AOSCMD<1:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
R/W-0
U-0
—
APSTSCLR<2:0>
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
U-0
—
R/W-0
U-0
—
bit 8
bit 0