dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 285

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dspic33fj128gp204

Manufacturer Part Number
dspic33fj128gp204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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25.0
The programmable CRC generator offers the following
features:
• User-programmable polynomial CRC equation
• Interrupt output
• Data FIFO
25.1
The module implements a software configurable CRC
generator. The terms of the polynomial and its length
can be programmed using the CRCXOR (X<15:1>) bits
and the CRCCON (PLEN<3:0>) bits, respectively.
FIGURE 25-1:
© 2009 Microchip Technology Inc.
Note:
D
PLEN<3:0>
OUT
XOR
PROGRAMMABLE CYCLIC
REDUNDANCY CHECK (CRC)
GENERATOR
Overview
This data sheet summarizes the features
of
dsPIC33FJ64GPX02/X04
dsPIC33FJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
the “dsPIC33F Family Reference Manual”,
“Section 36. Programmable Cyclic
Redundancy Check (CRC)” (DS70298),
which is available from the Microchip web-
site (www.microchip.com).
IN
p_clk
Hold
BIT 0
OUT
the
0
CRC SHIFTER DETAILS
dsPIC33FJ32GP302/304,
X1
0
1
IN
p_clk
BIT 1
Hold
families
OUT
1
and
Preliminary
CRC Shift Register
of
X2
0
1
CRC Write Bus
EQUATION 25-1:
To program this polynomial into the CRC generator,
the CRC register bits should be set as shown in
Table 25-1.
TABLE 25-1:
For the value of X<15:1>, the 12th bit and the 5th bit are
set to ‘1’, as required by the CRC equation. The 0th bit
required by the CRC equation is always XORed. For a
16-bit polynomial, the 16th bit is also always assumed
to be XORed; therefore, the X<15:1> bits do not have
the 0th bit or the 16th bit.
The topology of a standard CRC generator is shown in
Figure 25-2.
IN
p_clk
Hold
BIT 2
PLEN<3:0>
OUT
Bit Name
X<15:1>
2
CRC Read Bus
x
16
EXAMPLE CRC SETUP
X3
0
1
+
CRC EQUATION
x
12
X15
000100000010000
0
1
+
x
5
Bit Value
+
IN
BIT 15
1
1111
p_clk
Hold
DS70292C-page 283
OUT
15

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