dspic33fj128gp204 Microchip Technology Inc., dspic33fj128gp204 Datasheet - Page 153
dspic33fj128gp204
Manufacturer Part Number
dspic33fj128gp204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ128GP204.pdf
(386 pages)
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REGISTER 10-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
I2C1MD
R/W-0
R/W-0
T5MD
T5MD: Timer5 Module Disable bit
1 = Timer5 module is disabled
0 = Timer5 module is enabled
T4MD: Timer4 Module Disable bit
1 = Timer4 module is disabled
0 = Timer4 module is enabled
T3MD: Timer3 Module Disable bit
1 = Timer3 module is disabled
0 = Timer3 module is enabled
T2MD: Timer2 Module Disable bit
1 = Timer2 module is disabled
0 = Timer2 module is enabled
T1MD: Timer1 Module Disable bit
1 = Timer1 module is disabled
0 = Timer1 module is enabled
Unimplemented: Read as ‘0’
DCIMD: DCI Module Disable bit
1 = DCI module is disabled
0 = DCI module is enabled
I2C1MD: I
1 = I
0 = I
U2MD: UART2 Module Disable bit
1 = UART2 module is disabled
0 = UART2 module is enabled
U1MD: UART1 Module Disable bit
1 = UART1 module is disabled
0 = UART1 module is enabled
SPI2MD: SPI2 Module Disable bit
1 = SPI2 module is disabled
0 = SPI2 module is enabled
SPI1MD: SPI1 Module Disable bit
1 = SPI1 module is disabled
0 = SPI1 module is enabled
Unimplemented: Read as ‘0’
C1MD: ECAN1 Module Disable bit
1 = ECAN1 module is disabled
0 = ECAN1 module is enabled
AD1MD: ADC1 Module Disable bit
1 = ADC1 module is disabled
0 = ADC1 module is enabled
R/W-0
R/W-0
U2MD
T4MD
2
2
C1 module is disabled
C1 module is enabled
PMD1: PERIPHERAL MODULE DISABLE CONTROL REGISTER 1
2
C1 Module Disable bit
W = Writable bit
‘1’ = Bit is set
U1MD
R/W-0
T3MD
R/W-0
SPI2MD
R/W-0
R/W-0
T2MD
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SPI1MD
R/W-0
R/W-0
T1MD
U-0
U-0
—
—
x = Bit is unknown
C1MD
R/W-0
U-0
—
DS70292C-page 151
AD1MD
DCIMD
R/W-0
R/W-0
bit 8
bit 0
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