m58lt256jsb STMicroelectronics, m58lt256jsb Datasheet - Page 36

• Manufacturer Part Number: m58lt256jsb
• Description: 256 Mbit 16 Mb 16, Multiple Bank, Multilevel, Burst 1.8 V Supply, Secure Flash Memories
• Manufacturer: STMicroelectronics

Status Register
5.6
5.7
5.8
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Program suspend status bit (SR2)
The program suspend status bit indicates that a program operation has been suspended in
the addressed block. The program suspend status bit should only be considered valid when
the Program/Erase Controller status bit is High (Program/Erase Controller inactive).
When the program suspend status bit is High (set to ‘1’), a Program/Erase Suspend
command has been issued and the memory is waiting for a Program/Erase Resume
command.
SR2 is set within the program suspend latency time of the Program/Erase Suspend
command being issued, therefore, the memory may still complete the operation rather than
entering the suspend mode.
When a Program/Erase Resume command is issued, the Program Suspend status bit
returns Low.
Block protection status bit (SR1)
The block protection status bit i identifies if a program or block erase operation has tried to
modify the contents of a protected block.
When the block protection status bit is High (set to ‘1’), a program or erase operation has
been attempted on a protected block.
Once set High, the block protection status bit must be set Low by a Clear Status Register
command or a hardware reset before a new program or erase command is issued;
otherwise, the new command appears to fail.
Bank write/multiple word program status bit (SR0)
The bank write status bit indicates whether the addressed bank is programming or erasing.
In buffer enhanced factory program mode the multiple word program bit shows if the device
is ready to accept a new word to be programmed to the memory array.
The bank write status bit should only be considered valid when the Program/Erase
Controller status bit SR7 is Low (set to ‘0’).
When both the Program/Erase Controller status bit and the bank write status bit are Low (set
to ‘0’), the addressed bank is executing a program or erase operation. When the
Program/Erase Controller status bit is Low (set to ‘0’) and the bank write status bit is High
(set to ‘1’), a program or erase operation is being executed in a bank other than the one
being addressed.
In buffer enhanced factory program mode if the multiple word program status bit is Low (set
to ‘0’), the device is ready for the next word. If the multiple word program status bit is High
(set to ‘1’), the device is not ready for the next word.
For further details on how to use the Status Register, see the flowcharts and pseudocodes
provided in
Appendix
C.
M58LT256JST, M58LT256JSB