m58lt256jsb STMicroelectronics, m58lt256jsb Datasheet - Page 35

• Manufacturer Part Number: m58lt256jsb
• Description: 256 Mbit 16 Mb 16, Multiple Bank, Multilevel, Burst 1.8 V Supply, Secure Flash Memories
• Manufacturer: STMicroelectronics

M58LT256JST, M58LT256JSB
5.3
5.4
5.5
Erase/blank check status bit (SR5)
The erase/blank check status bit identifies if there was an error during a block erase
operation. When the erase/blank check status bit is High (set to ‘1’), the Program/Erase
Controller has applied the maximum number of pulses to the block and still failed to verify
that it has erased correctly.
The erase/blank check status bit should be read once the Program/Erase Controller status
bit is High (Program/Erase Controller inactive).
The erase/blank check status bit also indicates whether an error occurred during the Blank
Check operation. If the data at one or more locations in the block where the Blank Check
command has been issued is different from FFFFh, SR5 is set to '1'.
Once set High, the erase/blank check status bit must be set Low by a Clear Status Register
command or a hardware reset before a new erase command is issued, otherwise, the new
command appears to fail.
Program status bit (SR4)
The program status bit is used to identify if there was an error during a program operation.
The program status bit should be read once the Program/Erase Controller status bit is High
(Program/Erase Controller inactive).
When the program status bit is High (set to ‘1’), the Program/Erase Controller has applied
the maximum number of pulses to the word and still failed to verify that it has programmed
correctly.
Once set High, the program status bit must be set Low by a Clear Status Register command
or a hardware reset before a new program command is issued; otherwise, the new
command appears to fail.
V
The V
operations. The V
Program and erase operations are not guaranteed if V
operation.
When the V
voltage.
When the V
lockout voltage, V
be performed.
Once set High, the V
hardware reset before a new program or erase command is issued; otherwise, the new
command appears to fail.
PP
PP
status bit (SR3)
status bit identifies an invalid voltage on the V
PP
PP
status bit is Low (set to ‘0’), the voltage on the V
status bit is High (set to ‘1’), the V
PPLK
PP
PP
pin is only sampled at the beginning of a program or erase operation.
, the memory is protected and program and erase operations cannot
status bit must be set Low by a Clear Status Register command or a
PP
pin has a voltage that is below the V
PP
PP
becomes invalid during an
pin during program and erase
PP
pin was sampled at a valid
Status Register
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PP