m58lt256jsb STMicroelectronics, m58lt256jsb Datasheet - Page 100

• Manufacturer Part Number: m58lt256jsb
• Description: 256 Mbit 16 Mb 16, Multiple Bank, Multilevel, Burst 1.8 V Supply, Secure Flash Memories
• Manufacturer: STMicroelectronics

Command interface state tables
Table 45.
1. CI = Command Interface, CR = Configuration register, BEFP = Buffer Enhanced Factory program, P/E C = Program/Erase
2. At Power-up, all banks are in. Issuing a Read Array command to a busy bank, results in undetermined data output.
3. The two cycle command should be issued to the same bank address.
4. If the P/E C is active, both cycles are ignored.
5. The Clear Status Register command clears the SR error bits except when the P/E C. is busy or suspended.
6. BEFP is allowed only when Status Register bit SR0 is reset to '0'. BEFP is busy if Block Address is first BEFP Address. Any
100/108
in Erase Suspend
Protect/CR Setup
Current CI State
Check
Buffer
Blank
EFP
controller, IS = Illegal State, BP = Buffer Program, ES = Erase Suspend.
other commands are treated as data.
Setup
Setup
Busy
Busy
Command interface states - modify table, next state
Array
(FFh)
Read
(2)
Setup
Program
(10/40h)
Erase Suspend (Protect Error)
(3)(4)
Program
Buffer
(E8h)
Ready (error)
(3)(4)
Ready (error)
Setup
Erase,
Block
(20h)
(3)(4)
Setup
BEFP
(80h)
Check
Blank
setup
(BCh)
Blank Check busy
Command Input
BEFP Busy
P/E Resume,
Confirm
BEFP Busy
Unprotect
confirm,
Suspend
Confirm
Erase
Block
BEFP
(D0h)
Erase
(6)
(3)(4)
confirm
(1)
Check
Check
Blank
(CBh)
Blank
busy
(continued)
M58LT256JST, M58LT256JSB
Program,
Program/
Suspend
Erase Suspend (Protect Error)
Buffer
Erase
(B0h)
Ready (error)
Register
Status
Read
(70h)
Ready (error)
Register
Status
Clear
(50h)
(5)
Electronic
CFI Query
Signature
(90h, 98h)
, Read
Read