w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 57

• Manufacturer Part Number: w83877atd
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

Bit 1:
Bit 0:
(2) UART FIFO Control Register (UFR):
Legacy UART: The definition of this register is same as Legacy UART mode.
Advanced UART:
Bit 7, 6:
Bit 5, 4:
Advanced
Reset Value
Legacy
UART
UART
Mode
Not used.
TXEMP_I - Transmitter Empty.
Set to 1 when transmitter (or, say, FIFO + Transmitter) is empty. Clear to 0 when this
register is read.
RXTH_I - Receiver Threshold Interrupt.
Set to 1 when (1) the Receiver Buffer Register (RBR) is equal to or larger than the
threshold level, (2) RBR occurs time-out if the receiver buffer register has valid data and
below the threshold level. Clear to 0 when RBR is less than threshold level from reading
RBR.
RXFTL1, 0 - Receiver FIFO Threshold Level
Definition is same as Legacy UART, that is to determine the RXTH_I to become 1 when
the Receiver FIFO Threshold Level is equal or larger than the defined value shownbelow.
Note that the FIFO Size is referred to SET2.Reg4.
TXFTL1, 0 - Transmitter FIFO Threshold Level
To determine the TXTH_I (Transmitter Threshold Level Interrupt) is set to 1 when the
Transmitter Threshold Level is less than the programmed value shown as follows.
RXFTL1
RXFTL1
RXFTL1, 0
(MSB)
(MSB)
Bit 7
(Bit 7, 6)
0
00
01
10
11
RXFTL0
RXFTL0
(LSB)
(LSB)
Bit 6
0
RX FIFO Threshold Level
TXFTL1
(FIFO Size: 16-byte)
(MSB)
Bit 5
0
0
14
1
4
8
TXFTL0
(LSB)
Bit 4
- 53 -
0
0
Bit 3
0
0
0
RX FIFO Threshold Level
(FIFO Size: 32-byte)
Publication Release Date: April 1998
TXF_RST RXF_RST EN_FIFO
TXF_RST RXF_RST EN_FIFO
Bit 2
0
16
26
1
4
W83877ATF
Bit 1
0
Version 0.51
Bit 0
0