w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 124

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
GCS0IOW (Bit 2): See below.
GDA0OPI (Bit 1): See below.
GDA0IPI (Bit 0): See below.
8.2.21 Configuration Register 15 (CR15), default = 00H
When the device is in Extended Function mode and EFIR is 15H, the CR15 register can be accessed
through EFDR. The bit definitions are as follows:
GCS0IOR
GDA0OPI
0
0
1
1
0
0
1
1
GCS0IOW
GDA0IPI
0
1
0
1
0
1
0
1
7
GIOP0 functions as a Chip Select pin, and will be active when
(AEN = L) AND (SA10-0 = GIO0AD10-0)
GIOP0 functions as a Chip Select pin, and will be active when
(AEN = L) AND (SA10-0 = GIO0AD10-0) AND (NIOW = L)
GIOP0 functions as a Chip Select pin, and will be active when
(AEN = L) AND (SA10-0 = GIO0AD10-0) AND (NIOR = L)
GIOP0 functions as a Chip Select pin, and will be active when
(AEN = L) AND (SA10-0 = GIO0AD10-0) AND (NIOW = L OR
NIOR = L)
GIOP0 functions as a data pin, and GIOP0 SD0, SD0 GIOP0
GIOP0 functions as a data pin, and inverse GIOP0 SD0,
SD0 GIOP0
GIOP0 functions as a data pin, and GIOP0 SD0, inverse
SD0 GIOP0
GIOP0 functions as a data pin, and inverse GIOP0 SD0, inverse
SD0 GIOP0
6
5
4
3
- 120 -
2
1
0
GDA0IPI
GDA0OPI
GCS0IOW
GCS0IOR
GIO0CSH
GIOP0MD0
GIOP0MD1
GIOP0MD2
Publication Release Date: April 1998
W83877ATF
Version 0.51

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