w83877atd Winbond Electronics Corp America, w83877atd Datasheet - Page 118

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w83877atd

Manufacturer Part Number
w83877atd
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
8.2.13 Configuration Register C (CR0C), default = 28H
When the device is in Extended Function mode and EFIR is 0CH, the CR0C register can be accessed
through EFDR. The bit definitions are as follows:
TURA (Bit 7):
TURB (Bit 6):
HEFERE (Bit 5): this bit combines with HEFRAS (CR16 bit 0) to define how to enable Extended
The default value of HEFERE is 1.
Bit 4: Reserved.
URIRSEL (Bit 3):
The default value of URIRSEL is 1.
Bit 2: Reserved.
RX2INV (Bit 1):
TX2INV (Bit 0):
HEFRAS
0
1
0
1
0
1
0
1
0
1
0
0
1
1
the clock source of UART A is 24 MHz, it can make the baudrate of UART A up to 1.5
MHz
the clock source of UART B is 24 MHz, it can make the baudrate of UART A up to 1.5
MHz
the clock source of UART A is 1.8462 MHZ (24 MHz divide 13) (default)
the clock source of UART B is 1.8462 MHz (24 MHz divide 13) (default)
select UART B as IR function.
select UART B as normal function.
the SINB pin of UART B function or IRRX pin of IR function in normal condition.
inverse the SINB pin of UART B function or IRRX pin of IR function
the SOUTB pin of UART B function or IRTX pin of IR function in normal condition.
inverse the SOUTB pin of UART B function or IRTX pin of IR function.
Function Registers.
HEFERE
0
1
0
1
7
6
5
write 88H to the location 250H
write 89H to the location 250H (default)
write 86H to the location 3F0H twice
write 87H to the location 3F0H twice
4
3
- 114 -
address and value
2
1
0
TX2INV
RX2INV
reserved
URIRSEL
reserved
HEFERE
TURB
TURA
Publication Release Date: April 1998
W83877ATF
Version 0.51

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