lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 9
lpc47s457-ns
Manufacturer Part Number
lpc47s457-ns
Description
Advanced I/o With X-bus Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LPC47S457-NS.pdf
(259 pages)
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Part Number:
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1
GENERAL DESCRIPTION
The LPC47S45x is a 3.3V PC2001 compliant Super I/O controller designed for server applications. The LPC47S45x
implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the
ISA/X-bus with a substantial savings in pins used. The part provides 55 GPIO pins, ACPI support, an X-Bus
interface, two SMBus controllers, a fan speed control output, a fan tachometer input and four ISA IRQs that can be
routed to any of the serial IRQs. The LPC47S45x also provides Power on Elapsed Time counters for Main Power and
Standby Power, power supply on/off control, and a Real Time Clock.
The X-Bus interface allows the LPC47S45x to interface to as many as four external components that have an eight
bit data bus and occupy up to 4 contiguous I/O address ports. It is accessible by either the SMBus or the LPC
interface. It is capable of interfacing to an LCD Panel Interface Controller without any external logic and it can be
used for Port 80h monitoring.
The LPC47S45x offers two SMBus controllers that share the same pin interface. The SMBus slave only device
provides external access to an LCD controller that can be attached to the X-Bus. It is capable of disabling the floppy
port, the serial ports, and the parallel port. The SMBus slave only device can also tristate the Serial Port 2 interface
so that it may be muxed with an external UART controller. The LPC47S45x is equipped with two counters that may
be monitored either by the SMBus slave only device or by the LPC interface, which monitor the length of time VCC
and VTR are active.
The LPC47S45x incorporates a keyboard interface, SMSC's true CMOS 765B floppy disk controller, advanced digital
data separator, two 16C550 compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus
EPP and ECP, and Intelligent Power Management. The true CMOS 765B core provides 100% compatibility with IBM
PC/XT and PC/AT architectures in addition to providing data overflow and underflow protection.
The SMSC
advanced digital data separator incorporates SMSC's patented data separator technology, allowing for ease of
testing and use. The on-chip UARTs are compatible with the NS16C550. The parallel port is compatible with IBM
PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47S45x incorporates sophisticated power control
circuitry (PCC). The PCC supports multiple low power down modes.
The LPC47S45x supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the recommended
functionality to support Windows 2000, Windows Me, and PC2001. The I/O Address, DMA Channel and Hardware
IRQ of each logical device in the LPC47S45x may be reprogrammed through the internal configuration registers.
There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels.
SMSC LPC47S45x
Page 9 of 259
Rev. 08-10-09
DATASHEET
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