lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 220
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lpc47s457-ns
Manufacturer Part Number
lpc47s457-ns
Description
Advanced I/o With X-bus Interface
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LPC47S457-NS.pdf
(259 pages)
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Part Number:
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SMSC LPC47S45x
Clock Select
Default = 0x00
on VTR POR
IRQ8 Polarity
Default = 0x00
on VTR POR
IRQIN Routing
Register 1
Default = 0x00
on VTR POR
NAME
REG INDEX
(R/W)
(R/W)
(R/W)
0xF1
0xF4
0xF0
Table 94 − Runtime Registers, Logical Device A
Bit[0] (CLK32_PRSN) See Note.
0 = Either a single-input 32kHz clock is connected to the CLKI32 pin
or a crystal oscillator is connected to the XTAL1and XTAL2 pins
(crystal oscillator is default case).
1 = Neither the 32kHz clock nor the crystal oscillator are connected
to the CLKI32 pin
Note: When Bit[1]=1, the 32kHz clock is derived internally from the
14MHz clock input (see Note)
Bit[1] SPEKEY_EN. This bit is used to turn the logic for the “wake on
specific key” feature on and off. It will disable the 32kHz clock input
to the logic when turned off. The logic will draw no power when
disabled.
0= “Wake on specific key” logic is on (default)
1= “Wake on specific key” logic is off
Bit[2] (CLKO40_PWR)
0 = 40MHz clock output is on (default)
1 = 40MHz clock output is off
Bits[7:3] are reserved
Bits[7:1] Reserved
Bit[0] IRQ8 Polarity
0 = IRQ8 is active high (non-inverted). Default.
1 = IRQ8 is active low (inverted).
Bits[7:4] IRQINB routing. Selects which serial interrupt is used for
IRQINB. See bit mapping below.
Bits[3:0] IRQINA routing. Selects which serial interrupt is used for
IRQINA. See bit mapping below.
Bits[7:4] and bits[3:0] mapping:
Note: nIO_SMI must be disabled to use IRQ2 for an interrupt other
than SMI.
DATASHEET
0x00= no interrupt selected
0x01= IRQ1
0x02= IRQ2/nIO_SMI
0x03= IRQ3
0x04= IRQ4
0x05= IRQ5
0x06= IRQ6
0x07= IRQ7
0x08= IRQ8
0x09= IRQ9
0x0A= IRQ10
0x0B= IRQ11
0x0C= IRQ12
0x0D= IRQ13
0x0E= IRQ14
0x0F= IRQ15
Page 220 of 259
DEFINITION
Rev. 08-10-09
STATE
C
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