lpc47s457-ns Standard Microsystems Corp., lpc47s457-ns Datasheet - Page 170

• Manufacturer Part Number: lpc47s457-ns
• Description: Advanced I/o With X-bus Interface
• Manufacturer: Standard Microsystems Corp.

SMSC LPC47S45x
UART1 FIFO Control
Shadow
Default = 0x00 on
VCC POR,
VTR POR and PCI
RESET
Edge Select Register
Default = 0x00
on VTR POR
NAME
REG OFFSET
(R/W)
(hex)
(R)
20
21
DATASHEET
UART FIFO Control Shadow 1
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
Bit[0] EDGE_P12_SMI
0= P12 SMI status bit is set on the high-to-low edge of P1.2
1= P12 SMI status bit is set on both the high-to-low and low-to-
high edge of P1.2
Bit[1] EDGE_P16_SMI
0= P16 SMI status bit is set on the high-to-low edge of P1.6
1= P16 SMI status bit is set on both the high-to-low and low-to-
high edge of P1.6
Bit[2] EDGE_P12_PME
0= P12 PME status bit is set on the high-to-low edge of P1.2
1= P12 PME status bit is set on both the high-to-low and low-to-
high edge of P1.2
Bit[3] EDGE_P16_PME
0= P16 PME status bit is set on the high-to-low edge of P1.6
1= P16 PME status bit is set on both the high-to-low and low-to-
high edge of P1.6
Bits[7:4] Reserved
Page 170 of 259
DESCRIPTION
Rev. 08-10-09