isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 98

• Manufacturer Part Number: isp1161bm
• Description: Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 85:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
DcInterruptEnable register: bit allocation
IEP14
R/W
R/W
31
23
0
0
13.1.5 DcInterruptEnable Register (R/W: C3H/C2H)
This command is used to individually enable or disable interrupts from all endpoints,
as well as interrupts caused by events on the USB bus (SOF, SOF lost, EOT,
suspend, resume, reset). That is, if an interrupt event occurs while the interrupt is not
enabled, nothing will be seen on the interrupt pin. Even if you then enable the
interrupt during the interrupt event, there will still be no interrupt seen on the interrupt
pin, see
The DcInterrupt register will not register any interrupt, if it is not already enabled
using the DcInterruptEnable register. The DcInterruptEnable register is not an
Interrupt Mask register.
A bus reset will not change any of the programmed bit values.
The command accesses the DcInterruptEnable register, which consists of 4 bytes.
The bit allocation is given in
Remark: For details on interrupt control, see
Code (Hex): C2/C3 — write/read DcInterruptEnable register
Transaction — write/read 2 words
IEP13
Fig 43. Interrupt pin waveform.
R/W
R/W
30
22
0
0
Pin INT2: HIGH = de-assert; LOW = assert; INTENA = 1.
Figure
IEP12
R/W
R/W
29
21
43.
0
0
Rev. 02 — 13 December 2002
INT2 pin
DcInterruptEnable
disabled
register
interrupt
occurs
event
IEP11
Full-speed USB single-chip host and device controller
R/W
R/W
28
20
Table
0
0
reserved
DcInterruptEnable
85.
enabled
register
IEP10
R/W
R/W
27
19
0
0
Section
interrupt
occurs
event
IEP9
R/W
R/W
26
18
interrupt is cleared
0
0
8.6.3.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
004aaa197
IEP8
R/W
R/W
25
17
0
0
ISP1161
IEP7
R/W
R/W
98 of 137
24
16
0
0