isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 53

• Manufacturer Part Number: isp1161bm
• Description: Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 20:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcFmInterval register: bit allocation
R/W
FIT
31
23
15
0
0
0
7
1
10.2.1 HcFmInterval register (R/W: 0DH/8DH)
10.2 HC frame counter registers
reserved
R/W
The HcFmInterval register contains a 14-bit value which indicates the bit time interval
in a frame (that is, between two consecutive SOFs), and a 15-bit value indicating the
full-speed maximum packet size that the HC may transmit or receive without causing
a scheduling overrun. The HCD may carry out minor adjustments on the
FrameInterval by writing a new value over the present one at each SOF. This provides
the programmability necessary for the HC to synchronize with an external clocking
resource and to adjust any unknown local clock offset.
Code (Hex): 0D — read
Code (Hex): 8D — write
Table 21:
Bit
31
30
22
14
0
0
0
6
1
HcFmInterval register: bit description
Symbol
FIT
29
21
13
0
0
1
5
0
Rev. 02 — 13 December 2002
Description
FrameIntervalToggle: The HCD toggles this bit whenever it loads
a new value to FrameInterval.
Full-speed USB single-chip host and device controller
28
20
12
0
0
0
4
1
FSMPS[7:0]
FI[7:0]
R/W
R/W
FSMPS[14:8]
R/W
27
19
11
0
0
1
3
1
FI[13:8]
R/W
26
18
10
0
0
1
2
1
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
25
17
0
0
9
1
1
1
ISP1161
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24
16
0
0
8
0
0
1