isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 69
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Philips Semiconductors
Table 42:
9397 750 09567
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hc PInterrupt register: bit allocation
reserved
15
7
0
10.4.4 Hc PInterrupt register (R/W: 24H/A4H)
ClkReady
Table 41:
All the bits in this register will be active on power-on reset. However, none of the
active bits will cause an interrupt on the interrupt pin (INT1) unless they are set by the
respective bits in the Hc PInterruptEnable register, and together with bit 0
(InterruptPinEnable) of the HcHardwareConfiguration register.
After this register (24H - read) is read, the bits that are active will not be reset, until
logic 1 is written to the bits in this register (A4H - write) to clear it.
The bits in this register are cleared only when you write to this register indicating the
bits to be cleared. To clear all the enabled bits in this register, the HCD must write
FFH to this register.
Code (Hex): 24 — read
Code (Hex): A4 — write
Table 43:
Bit
15 to 0
Bit
15 to 7
14
6
0
HcTransferCounter register: bit description
Hc PInterrupt register: bit description
Suspended
Symbol
Counter
value
Symbol
-
HC
13
5
0
Rev. 02 — 13 December 2002
Description
The number of data bytes to be read to or written from RAM.
OPR_Reg
Description
reserved
Full-speed USB single-chip host and device controller
R/W
12
4
0
reserved
00H
R/W
reserved
11
3
0
Interrupt
AllEOT
10
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
ATLInt
9
1
0
ISP1161
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