isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 47
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
R/W
R/W
23
15
0
7
0
HCFS[1:0]
Table 11:
Bit
31 to 11
10
9
8
7 to 6
5 to 0
R/W
R/W
R/W
22
14
0
6
0
HcControl register: bit description
Symbol
-
RWE
RWC
-
HCFS[1:0]
-
reserved
R/W
R/W
R/W
21
13
0
5
0
Rev. 02 — 13 December 2002
Description
reserved
RemoteWakeupEnable: This bit is used by the HCD to enable or
disable the remote wake-up feature upon the detection of
upstream resume signaling. When this bit is set and the
ResumeDetected bit in HcInterruptStatus is set, a remote wake-up
is signaled to the host system. Setting this bit has no impact on the
generation of hardware interrupt.
RemoteWakeupConnected: This bit indicates whether the HC
supports remote wake-up signaling. If remote wake-up is
supported and used by the system, it is the responsibility of
system firmware to set this bit during POST. The HC clears the bit
upon a hardware reset but does not alter it upon a software reset.
Remote wake-up signaling of the host system is host-bus-specific
and is not described in this specification.
reserved
HostControllerFunctionalState for USB:
00 — USBRESET
01 — USBRESUME
10 — USBOPERATIONAL
11 — USBSUSPEND
A transition to USBOPERATIONAL from another state causes
start-of-frame (SOF) generation to begin 1 ms later. The HCD may
determine whether the HC has begun sending SOFs by reading
the StartofFrame field of HcInterruptStatus.
This field may be changed by the HC only when in the
USBSUSPEND state. The HC may move from the USBSUSPEND
state to the USBRESUME state after detecting the resume
signaling from a downstream port.
The HC enters USBRESET after a software reset and a hardware
reset. The latter also resets the Root Hub and asserts subsequent
reset signaling to downstream ports.
reserved
Full-speed USB single-chip host and device controller
R/W
R/W
R/W
20
12
0
4
0
reserved
00H
R/W
R/W
R/W
19
11
0
3
0
reserved
RWE
R/W
R/W
R/W
18
10
0
2
0
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
RWC
R/W
R/W
R/W
17
9
0
1
0
ISP1161
reserved
R/W
R/W
R/W
47 of 137
16
8
0
0
0
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