mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 86

• Manufacturer Part Number: mpc8641
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Serial RapidIO
15.9
Since the LP-Serial electrical specification are guided by the XAUI electrical interface specified in Clause
47 of IEEE 802.3ae-2002, the measurement and test requirements defined here are similarly guided by
Clause 47. In addition, the CJPAT test pattern defined in Annex 48A of IEEE 802.3ae-2002 is specified as
the test pattern for use in eye pattern and jitter measurements. Annex 48B of IEEE 802.3ae-2002 is
recommended as a reference for additional information on jitter test methods.
15.9.1
For the purpose of eye template measurements, the effects of a single-pole high pass filter with a 3 dB point
at (Baud Frequency)/1667 is applied to the jitter. The data pattern for template measurements is the
Continuous Jitter Test Pattern (CJPAT) defined in Annex 48A of IEEE 802.3ae. All lanes of the LP-Serial
86
-V
-V
Measurement and Test Requirements
V
V
Table 62. Receiver Input Compliance Mask Parameters Exclusive of Sinusoidal Jitter
DIFF
DIFF
DIFF
DIFF
1.25 GBaud
2.5 GBaud
3.125 GBaud
Eye Template Measurements
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
min
max
max
min
0
Receiver Type
0
Figure 56. Receiver Input Compliance Mask
A
V
DIFF
min (mV)
100
100
100
B
Time (UI)
V
DIFF
max (mV)
800
800
800
1-B
1-A
A (UI)
0.275
0.275
0.275
Freescale Semiconductor
B (UI)
0.400
0.400
0.400
1