mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 57

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mpc8641

Manufacturer Part Number
mpc8641
Description
Integrated Host Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
All values refer to V
12.2
Table 46
Freescale Semiconductor
At recommended operating conditions with OV
SCL clock frequency
Low period of the SCL clock
High period of the SCL clock
Setup time for a repeated START condition
Hold time (repeated) START condition (after this period, the first
clock pulse is generated)
Data setup time
Data input hold time:
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Data output delay time
Set-up time for STOP condition
Bus free time between a STOP and START condition
Noise margin at the LOW level for each connected device
(including hysteresis)
Parameter
Capacitance for each I/O pin
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the MPC8641 Integrated Host Processor Reference Manual for information on the digital filter used.
3. I/O pins will obstruct the SDA and SCL lines if OV
provides the AC timing parameters for the I
I
2
C AC Electrical Specifications
IH
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
(min) and V
Parameter
IL
Table 45. I
(max) levels (see
CBUS compatible masters
Table 46. I
DD
2
C DC Electrical Characteristics (continued)
of 3.3 V ± 5%.
Table
I
2
C bus devices
2
C AC Electrical Specifications
45).
DD
is switched off.
Symbol
C
I
2
C interfaces.
Symbol
t
t
t
t
I2SVKH
I2SXKL
I2DVKH
t
t
t
I2PVKH
t
t
I2KHDX
I2DXKL
I2OVKL
I2CH
t
I2CL
t
V
I2CR
I2CF
f
I2C
NL
4
4
Min
4
4
4
1
20 + 0.1 C
20 + 0.1 C
0.1 × OV
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
0
0
2
DD
Max
b
B
10
5
5
0.9
Max
400
300
300
Unit
pF
3
Notes
Unit
kHz
μs
μs
μs
μs
μs
μs
μs
μs
ns
ns
ns
V
I
57
2
C

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