mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 55

• Manufacturer Part Number: mpc8641
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

At recommended operating conditions (see
Figure 32
Figure 33
Freescale Semiconductor
Output hold times:
JTAG external clock to output high impedance:
Notes:
1. All outputs are measured from the midpoint voltage of the falling/rising edge of t
2. The symbols used for timing specifications herein follow the pattern of t
3. TRST is an asynchronous level sensitive signal. The setup time is for test purposes only.
4. Non-JTAG signal input timing with respect to t
5. Non-JTAG signal output timing with respect to t
6. Guaranteed by design.
The output timings are measured at the pins. All output timings assume a purely resistive 50-Ω load (see
Time-of-flight delays must be added for trace lengths, vias, and connectors in the system.
for inputs and t
device timing (JT) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
(K) going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol representation is based on three letters representing the clock of a particular functional. For rise and fall
times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
provides the AC test load for TDO and the boundary-scan outputs.
provides the JTAG clock input timing diagram.
Table 44. JTAG AC Timing Specifications (Independent of SYSCLK)
External Clock
(first two letters of functional block)(reference)(state)(signal)(state)
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Parameter
JTAG
Output
Figure 32. AC Test Load for the JTAG Interface
Figure 33. JTAG Clock Input Timing Diagram
Boundary-scan data
Boundary-scan data
Table
VM
t
JTKHKL
3).
JTG
Z
VM = Midpoint Voltage (OV DD /2)
0
TCLK
clock reference (K) going to the high (H) state. Note that, in general, the clock
t
TCLK
= 50 Ω
JTG
TDO
TDO
.
JTDXKH
VM
.
symbolizes JTAG timing (JT) with respect to the time data input
Symbol
t
t
t
t
JTKLDX
JTKLOX
JTKLDZ
JTKLOZ
VM
for outputs. For example, t
2
(first two letters of functional block)(signal)(state) (reference)(state)
R
L
= 50 Ω
Min
TCLK
30
30
t
3
3
JTGR
to the midpoint of the signal in question.
OV
DD
Max
19
t
—
—
1
9
JTGF
/2
JTDVKH
(continued)
symbolizes JTAG
JTG
Unit
Figure
ns
ns
clock reference
32).
Notes
5, 6
5, 6
JTAG
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