mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 66

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mpc8641

Manufacturer Part Number
mpc8641
Description
Integrated Host Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
High-Speed Serial Interfaces (HSSI)
MPC8641D SerDes reference clock input’s DC requirement, AC-coupling has to be used.
assumes that the LVPECL clock driver’s output impedance is 50 Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC-coupling. Its value could be ranged from 140 Ω to 240 Ω depending on clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8641D SerDes
reference clock’s differential input amplitude requirement (between 200 mV and 800 mV differential
peak). For example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference
clock input amplitude is selected as 600mV, the attenuation factor is 0.67, which requires R2 = 25 Ω.
Please consult clock driver chip manufacturer to verify whether this connection scheme is compatible with
a particular clock driver chip.
66
LVPECL CLK
Driver Chip
Clock Driver
Clock Driver
Figure 45. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
CLK_Out
CLK_Out
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
R1
R1
100 Ω differential PWB trace
R2
R2
10nF
10nF
10nF
SD n _REF_CLK
SD n _REF_CLK
50 Ω
50 Ω
Freescale Semiconductor
MPC8641D
SerDes Refer.
CLK Receiver
Figure 45

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