mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 82

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mpc8641

Manufacturer Part Number
mpc8641
Description
Integrated Host Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Serial RapidIO
For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the
transmitter shall fall entirely within the unshaded portion of the Transmitter Output Compliance Mask
shown in
device and the device is driving a 100 Ω +/–5% differential resistive load. The output eye pattern of an
LP-Serial transmitter that implements pre-emphasis (to equalize the link and reduce inter-symbol
interference) need only comply with the Transmitter Output Compliance Mask when pre-emphasis is
disabled or minimized.
82
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Figure 54
V
V
-VDIFF max
Characteristic
-VDIFF min
DIFF
DIFF
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
max
min
Table 57. Long Run Transmitter AC Timing Specifications—3.125 GBaud
0
with the parameters specified in
0
Figure 54. Transmitter Output Compliance Mask
V
V
J
J
S
UI
A
D
T
O
DIFFPP
MO
Symbol
–0.40
800
320
Min
B
Table 58
Range
Time in UI
2.30
1600
0.35
1000
320
0.17
Max
when measured at the output pins of the
1-B
Volts
mV p-p
UI p-p
UI p-p
ps
ps
Unit
Voltage relative to COMMON
of either signal comprising a
differential pair
Skew at the transmitter output
between lanes of a multilane
link
+/– 100 ppm
1-A
Freescale Semiconductor
Notes
1

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