mpc8641 Freescale Semiconductor, Inc, mpc8641 Datasheet - Page 59

• Manufacturer Part Number: mpc8641
• Description: Integrated Host Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Figure 37
13 High-Speed Serial Interfaces (HSSI)
The MPC8641D features two Serializer/Deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications. The SerDes1 interface is dedicated for PCI Express data transfers. The SerDes2
can be used for PCI Express and/or Serial RapidIO data transfers.
This section describes the common portion of SerDes DC electrical specifications, which is the DC
requirement for SerDes Reference Clocks. The SerDes data lane’s transmitter and receiver reference
circuits are also shown.
13.1
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 38
description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a
receiver input (SDn_RX and SDn_RX). Each signal swings between A Volts and B Volts where A > B.
Using this waveform, the definitions are as follows. To simplify illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
Freescale Semiconductor
1. Single-Ended Swing
2. Differential Output Voltage, V
3. Differential Input Voltage, V
SDA
SCL
the two complimentary output voltages: V
or negative.
The Differential Output Voltage (or Swing) of the transmitter, V
SDn_RX each have a peak-to-peak swing of A – B Volts. This is also referred as each signal wire’s
Single-Ended Swing.
The transmitter output signals and the receiver input signals SDn_TX, SDn_TX, SDn_RX and
Signal Terms Definition
shows the AC timing diagram for the I
shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
S
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
t
I2CF
t
I2CL
t
I2SXKL
Figure 37. I
t
I2DXKL
ID
OD
t
(or Differential Input Swing):
I2DVKH
(or Differential Output Swing):
t
I2CH
2
C Bus AC Timing Diagram
t
SDn_TX
2
I2SXKL
C bus.
Sr
– V
SDn_TX.
t
I2SVKH
t
I2KHKL
The V
OD
, is defined as the difference of
t
OD
I2PVKH
High-Speed Serial Interfaces (HSSI)
value can be either positive
t
I2CR
P
t
I2CF
S
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