mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 377

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mc68hc908sr12

Manufacturer Part Number
mc68hc908sr12
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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24.8 5.0V Control Timing
24.9 3.0V Control Timing
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
Notes:
Notes:
Notes:
Low-voltage inhibit, trip voltage
(No hysteresis implemented for 3V LVI)
Schmitt trigger input low level trip voltage
RST, IRQ1, IRQ2, KBI[0:7]
Schmitt trigger input high level trip voltage
RST, IRQ1, IRQ2, KBI[0:7]
Internal operating frequency
RST input pulse width low
Internal operating frequency
RST input pulse width low
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
4. Wait I
5. STOP I
6. Maximum is highest voltage that POR is guaranteed.
7. If minimum V
8. R
1. V
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
1. V
2. Some modules may require a minimum frequency greater than dc for proper operation; see appropriate table for this
3. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse width to cause a reset.
100 pF on all outputs. C
Measured with all modules enabled.
all outputs. C
V
information.
information.
DD
SS
SS
DD
PU1
= 0 Vdc; timing shown with respect to 20% V
= 0 Vdc; timing shown with respect to 20% V
= 2.7 to 3.3 Vdc, V
is reached.
and R
DD
DD
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than 100 pF on
measured with OSC1 grounded, no port pins sourcing current.
PU2
DD
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
are measured at V
is not reached before the internal POR reset is released,
DD
Characteristic
measured using external square wave clock source. All inputs 0.2 V from rail. No dc loads. Less than
Characteristic
Characteristic
SS
L
(3)
(3)
= 0 Vdc, T
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects run I
Table 24-5. 3V DC Electrical Characteristics
(2)
(2)
DD
(1)
A
= 5.0V.
Table 24-6. 5V Control Timing
Table 24-7. 3V Control Timing
= T
(1)
(1)
L
to T
Electrical Specifications
H
, unless otherwise noted.
DD
DD
and 70% V
and 70% V
Symbol
V
V
V
SCMTH
SCMTL
LVI3
DD
DD
, unless otherwise noted.
, unless otherwise noted.
Symbol
Symbol
RST
t
t
f
f
IRL
IRL
OP
OP
Min
2.32
must be driven low externally until minimum
Min
750
Min
1.5
Typ
2.49
0.8
1.2
(2)
Electrical Specifications
Max
Max
5.0V Control Timing
8.0
4.0
Max
2.68
DD
.
Data Sheet
MHz
MHz
Unit
Unit
µs
ns
Unit
V
V
V
DD
377
.

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