mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 239

• Manufacturer Part Number: mc68hc908sr12
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

15.4.7 Data Register Interlocking
15.4.8 Monotonicity
15.5 Interrupts
15.6 Low-Power Modes
15.6.1 Wait Mode
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
Reading ADRH in any 10-bit mode latches the contents of ADRL until
ADRL is read. Until ADRL is read all subsequent ADC results will be lost.
This register interlocking can also be reset by a write to the ADC status
and control register, or ADC clock control register. A power-on reset or
reset will also clear the interlocking. Note that an external conversion
request will not reset the lock.
The conversion process is monotonic and has no missing codes.
When the AIEN bit is set, the ADC module is capable of generating a
CPU interrupt after each ADC conversion or after an auto-scan
conversion cycle. A CPU interrupt is generated if the COCO bit is at
logic 0. The COCO bit is not used as a conversion complete flag when
interrupts are enabled. The interrupt vector is defined in
Vector
The STOP and WAIT instructions put the MCU in low power-
consumption standby modes.
The ADC continues normal operation in wait mode. Any enabled CPU
interrupt request from the ADC can bring the MCU out of wait mode. If
the ADC is not required to bring the MCU out of wait mode, power down
the ADC by setting the ADCH[4:0] bits to logic 1’s before executing the
WAIT instruction.
Addresses.
Analog-to-Digital Converter (ADC)
Analog-to-Digital Converter (ADC)
Table 2-1 .
Data Sheet
Interrupts
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