mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 173

• Manufacturer Part Number: mc68hc908sr12
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

10.4.4 Baud Rate
10.4.5 Commands
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Freescale Semiconductor
The communication baud rate is controlled by the crystal frequency and
the state of the PTC1 pin (when IRQ1 is set to V
monitor mode. When PTC1 is high, the divide by ratio is 1024. If the
PTC1 pin is at logic 0 upon entry into monitor mode, the divide by ratio
is 512.
If monitor mode was entered with V
is set at 1024, regardless of PTC1. If monitor mode was entered with V
on IRQ, then the internal PLL steps up the external frequency, presumed
to be 32.768 kHz, to 2.4576 MHz. These latter two conditions for monitor
mode entry require that the reset vector is blank.
Table 10-3
baud rate of 9600 BPS. Other standard baud rates can be accomplished
using proportionally higher or lower frequency generators. If using a
crystal as the clock source, be aware of the upper frequency limit that the
internal clock module can handle. See
Characteristics
The monitor ROM firmware uses these commands:
•
•
•
4.9152 MHz
9.8304 MHz
9.8304 MHz
Frequency
32.768 kHz
External
READ (read memory)
WRITE (write memory)
IREAD (indexed read)
lists external frequencies required to achieve a standard
Table 10-3. Monitor Baud Rate Selection
Monitor ROM (MON)
and
IRQ1
V
V
V
V
24.8 5.0V Control Timing
TST
TST
DD
SS
PTC1
X
X
0
1
DD
on IRQ1, then the divide by ratio
24.6 5.0V DC Electrical
2.4576 MHz
2.4576 MHz
2.4576 MHz
2.4576 MHz
Frequency
Internal
TST
for this limit.
) upon entry into
Functional Description
Monitor ROM (MON)
Baud Rate
(BPS)
9600
9600
9600
9600
Data Sheet
173
SS