mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 204

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mc68hc908sr12

Manufacturer Part Number
mc68hc908sr12
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface Module (TIM)
Data Sheet
204
Address: T1CH0H, $0026 and T2CH0H, $0031
Address: T1CH0L, $0027 and T2CH0L $0032
Address: T1CH1H, $0029 and T2CH1H, $0034
Address: T1CH1L, $002A and T2CH1L, $0035
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIM channel x registers (TCHxH) inhibits input captures until the low
byte (TCHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of
the TIM channel x registers (TCHxH) inhibits output compares until the
low byte (TCHxL) is written.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 11-12. TIM Channel 0 Register High (TCH0H)
Figure 11-14. TIM Channel 1 Register High (TCH1H)
Figure 11-13. TIM Channel 0 Register Low (TCH0L)
Figure 11-15. TIM Channel 1 Register Low (TCH1L)
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Timer Interface Module (TIM)
14
14
6
6
6
6
6
6
13
13
5
5
5
5
5
5
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
12
12
4
4
4
4
4
4
11
11
3
3
3
3
3
3
Freescale Semiconductor
10
10
2
2
2
2
2
2
1
9
1
1
1
9
1
1
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0

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