mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 336

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mc68hc908sr12

Manufacturer Part Number
mc68hc908sr12
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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External Interrupt (IRQ)
19.4 Functional Description
Data Sheet
336
$001C
Addr.
$001E
IRQ2 Status and Control
IRQ1 Status and Control
Register Name
NOTE:
(INTSCR2)
(INTSCR1)
Register
Register
Figure 19-1. External Interrupt I/O Register Summary
References to either IRQ1 or IRQ2 may be made in the following text by
omitting the IRQ number. For example, IRQF may refer generically to
IRQ1F and IRQ2F, and IMASK may refer to IMASK1 and IMASK2.
A logic 0 applied to the external interrupt pin can latch a CPU interrupt
request.
module.
Interrupt signals on the IRQ pin are latched into the IRQ latch. An
interrupt latch remains set until one of the following actions occurs:
The external interrupt pin is falling-edge-triggered and is software-
configurable to be either falling-edge or falling-edge and low-level-
triggered. The MODE bit in the INTSCR controls the triggering sensitivity
of the IRQ pin.
Reset:
Reset:
Read:
Write:
Read:
Write:
Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the latch that caused the vector
fetch.
Software clear — Software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (INTSCR). Writing a logic 1 to the ACK bit clears
the IRQ latch.
Reset — A reset automatically clears the interrupt latch.
Bit 7
Figure 19-2
0
0
0
0
External Interrupt (IRQ)
= Unimplemented
PTBPUE6
6
0
0
0
and
Figure 19-3
5
0
0
0
0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
4
0
0
0
0
shows the structure of the IRQ
IRQ2F
IRQ1F
3
0
0
ACK2
ACK1
Freescale Semiconductor
2
0
0
0
0
IMASK2
IMASK1
1
0
0
MODE2
MODE1
Bit 0
0
0

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