mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 308

• Manufacturer Part Number: mc68hc908sr12
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Multi-Master IIC Interface (MMIIC)
17.7.6 MMIIC Data Receive Register (MMDRR)
Data Sheet
308
Address:
If the calling master does not return an acknowledge bit (MMRXAK = 1),
the module will release the SDA line for master to generate a STOP or
repeated START condition. The data in the MMDTR will not be
transferred to the output circuit until the next calling from a master. The
transmit buffer empty flag remains cleared (MMTXBE = 0).
In master mode, the data in MMDTR will be transferred to the output
circuit when:
If the slave does not return an acknowledge bit (MMRXAK = 1), the
master will generate a STOP or repeated START condition. The data in
the MMDTR will not be transferred to the output circuit. The transmit
buffer empty flag remains cleared (MMTXBE = 0).
The sequence of events for slave transmit and master transmit are
illustrated in
When the MMIIC module is enabled, MMEN = 1, data in this read-only
register depends on whether module is in master or slave mode.
In slave mode, the data in MMDRR is:
Reset:
Read: MMRD7
Write:
•
•
the module receives an acknowledge bit (MMRXAK = 0), after
setting master transmit mode (MMRW = 0), and the calling
address has been transmitted; or
the previous data in the output circuit has be transmitted and the
receiving slave returns an acknowledge bit, indicated by a
received acknowledge bit (MMRXAK = 0).
Figure 17-9. MMIIC Data Receive Register (MMDRR)
$004D
Bit 7
Multi-Master IIC Interface (MMIIC)
0
Figure
= Unimplemented
MMRD6
6
0
17-12.
MMRD5
5
0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
MMRD4
4
0
MMRD3
3
0
MMRD2
Freescale Semiconductor
2
0
MMRD1
1
0
MMRD0
Bit 0
0