ml670100 Oki Semiconductor, ml670100 Datasheet - Page 77
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ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
- Current page: 77 of 204
- Download datasheet (500Kb)
Bit Descriptions
The bits in PFS0 control the secondary pin functions for I/O port PIO0. Setting a bit to "1"
configures the corresponding pin as part of the external address bus XA; resetting it to "0," as
an I/O pin.
Port Function Selection Register 1 (PFS1) activates PIO1 pin secondary (XD pin) functions
together as a single group. Do not set the register to a value other than 0x00 or 0xFF. Doing so
produces unreliable operation.
After a system reset triggered by the external reset signal (nRST ), each bit has a value that
depends on the DBSEL input level during the reset. "L" level (GND) input sets them to "0"
(PSF1 = 0x00), and the PIO1 pins function as an I/O port; "H" level (V
"1" (PSF1 = 0xFF), and the pins function as external data bus pins XD15 to XD8.
The bits in PFS1 control the secondary pin functions for I/O port PIO1. Setting a bit to "1"
configures the corresponding pin as part of the external data bus XD; resetting it to "0," as an
I/O pin.
Port Function Selection Register n (PFSn, n=2 - 5) activates PIOn pin secondary functions at
the bit level.
After a system reset triggered by the external reset signal (nRST), PFS2 contains 0x7F and
PFS3 to PFS5 contain 0x00.
The bits in PFSn (n=2 - 5) control the secondary pin functions for I/O port PIOn. Setting a bit
to "1" configures the corresponding pin for its secondary function; resetting it to "0," as an I/O
pin.
(2) Port Function Selection Register 1 (PFS1)
Bit Descriptions
(3) Port Function Selection Register 2 to 5 (PFS, n=2 - 5)
Bit Descriptions
Figure 5.6 : Port Function Selection Register n (PFSn, n=2 - 5)
Figure 5.5 : Port Function Selection Register 1 (PFS1)
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
DD
) input sets them to
5-7
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