ml670100 Oki Semiconductor, ml670100 Datasheet - Page 70
ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
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4-22
Table 4.4 : Interrupt Response Times
Delay between application of
signal to pin and raising of
interrupt request flag
Wait for current instruction to
complete execution
Time required to save the PC
and CPSR registers and load
the vector address
Interrupt
response time
Step
Minimum
Total
Interrupt from external
source
X+2M+2
2
5
X (Minimum: 1)
Clock Cycles
2M
Interrupt from internal
source
X+2M
3
-
For instructions in internal
memory, the minimum wait is one
clock cycle. The worst case takes
20 clock cycles: an LDM
instruction loading all 16 general-
purpose registers.
M is the length of the instruction's
fetch cycle - one clock cycle for
instructions in internal memory.
Before fetching the instruction at
the vector address, the LSI
performs two dummy fetch
operations.
Notes
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