ml670100 Oki Semiconductor, ml670100 Datasheet - Page 168

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ml670100

Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
11.2.4
11-12
The Programmable Wait Control Register (PWCON) is an 8-bit read/write register whose two
halves specify the number of programmable wait cycles automatically inserted for accesses to
the SRAM banks (0 and 1).
After a system reset, this register contains 0x77.
Bit Descriptions
PWNn (n=0,1)
This field specifies the number of wait cycles automatically inserted for accesses to bank n. The
range is from 0 (no pausing) to 7.
Programmable Wait Control Register (PWCON)
7
0
Figure 11.6 : Programmable Wait Control Register (PWCON)
6
A "0” indicates a reserved bit. Always write "0” to it.
Writing "1” produces unreliable operation.
PWN1
5
4
3
0
2
PWN0
1
PWNn
(n=0,1)
000
001
010
011
100
101
110
111
0
Programmable wait for
bank n
0 cycles
1 cycle
2 cycles
3 cycles
4 cycles
5 cycles
6 cycles
7 cycles

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