ml670100 Oki Semiconductor, ml670100 Datasheet - Page 104

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

7.2.7
7-12
Timer Output Register n (TMnOUT, n=0 - 5) is an 8-bit read/write register that holds the
output level for Timer Output n pin (TMOUT[n], n=0 - 5).
After a system reset, this register contains 0x00.
Timer Output Registers 0 to 5 (TMnOUT, n=0 - 5)
Bit Descriptions
TMOUT
This bit holds the output level for Timer Output n pin (TMOUT[n], n=0 - 5). It can be modified
by the program or the timer channel in compare out (CMO) or pulse width modulation (PWM)
mode. If there is a conflict, the program takes precedence.
Setting it to "1" sets TMOUT[n] to "H" level; resetting it to "0," to "L" level.
- In compare out (CMO) mode, the value written by the program remains in effect until the
- In pulse width modulation (PWM) mode, the value written by the program remains in
7
0
next compare match, but is then updated in the manner specified in the IOLV field in
Timer I/O Level Register n (TMnIOLV, n=0 - 5).
effect until the next clock pulse and is then updated in the manner specified in the IOLV
field.
6
Figure 7.8 : Timer Output Registers 0 to 5 (TMnOUT, n=0 - 5)
0
5
0
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
4
0
3
0
2
0
1
0
TMOUT
0
0
1
Set TMOUT[n] to "L" level.
Set TMOUT[n] to "H" level.