ml670100 Oki Semiconductor, ml670100 Datasheet - Page 131

• Manufacturer Part Number: ml670100
• Description: Ml670100 Is A High-performance 32-bit Microcontroller
• Manufacturer: Oki Semiconductor

8.3.4
Receiving Data
To enable reception, the program must set the ASRVEN bit in the ASI Control Register
(ASICON) to "1."
Then, when the interface detects a start bit, it begins receiving one frame of data in the frame
format specified in ASICON. When it detects the stop bit(s), it transfers the contents of the
receive shift register to the ASBUF receive buffer, generates a receive ready interrupt request
(RVINT), and sets the ARVIRQ bit in the ASI Status Register (ASIST) to "1." If it detects any
errors, it sets the corresponding bits (PERR, OERR, and FERR) in ASIST to "1." Transferring
the received data to the ASBUF receive buffer empties the receive shift register, clearing the
interface for the next receive operation.
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