ml670100 Oki Semiconductor, ml670100 Datasheet - Page 43
ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
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3.1.2
3.2
3.2.1
Table 3.2 lists the control registers for the CPU control unit.
Reads from these control registers takes exactly one clock cycle; writes, at least two. Modifying
the standby control (SBYCON) or clock control (CKCON) register requires two operations:
writing 0x0000003C and then writing the new value. Without the first, the second is ignored.
HLT
Control Registers
Table 3.2 : CPU Control Unit Control Registers
Control Registers
Standby Control Register (SBYCON)
The Standby Control Register (SBYCON) is a 32-bit write-only register containing a control
bit for switching to HALT mode. After a system reset, it contains 0x00000000.
Bit Descriptions
This is HALT mode control bit. Writing "1" to this bit switches this LSI to HALT mode,
suspending operation of the CPU, but leaving the peripheral circuits operational. The LSI
automatically resets this bit to "0" when it wakes from HALT mode.
Address
0x040_0000
0x040_0004
0x040_000C
Name
Standby Control Register
Clock Control Register
Reset Status Register
Figure 3.1 : Standby Control Register (SBYCON)
31
0
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
30
0
-- -
3
0
Symbol
SBYCON
CKCON
RSTST
2
0
1
0
R/W Size
W
R/W
R
HLT
(bits)
32
32
32
0
Initial value
0x00000000
0x00000000
0x00000000
3-3
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