ml670100 Oki Semiconductor, ml670100 Datasheet - Page 58
ml670100
Manufacturer Part Number
ml670100
Description
Ml670100 Is A High-performance 32-bit Microcontroller
Manufacturer
Oki Semiconductor
Datasheet
1.ML670100.pdf
(204 pages)
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4.3.4
4-10
The External FIQ Control Register (EFIQCON) is an 8-bit read/write register that notes
external fast interrupt requests, tracks the signal level at the external fast interrupt request
(nEFIQ) pin, and controls masking of external fast interrupt requests.
After a system reset, it contains either 0x04 or 0x06.
EFIQM
This bit enables/disables masking of external fast interrupt requests. Setting it to "1" masks
requests; a "0" allows further processing.
EFIQS
This bit tracks the signal level at the external fast interrupt request (nEFIQ ) pin. A "0"
indicates "L" level input; a "1," "H" level input.
EFIQR
This bit goes to "1" when the interrupt controller detects a falling edge in the signal from the
nEFIQ pin. A "1" therefore indicates that one or more external fast interrupt requests have been
received; a "0," that none have been received.
Writing "1" to this bit resets it to "0." Writing "0" produces no change.
External FIQ Control Register (EFIQCON)
Bit Descriptions
7
0
6
0
Figure 4.5 : External FIQ Control Register (EFIQCON)
5
0
A "0" indicates a reserved bit. Always write "0" to it.
Writing "1" produces unreliable operation.
4
0
3
0
EFIQM EFIQS EFIQR
2
1
0
0
1
0
1
0
1
No external fast interrupt request pending
External fast interrupt request pending
nEFIQ pin at "L" level
nEFIQ pin at "H" level
Masking of external fast interrupt requests
disabled
Masking of external fast interrupt requests
enabled
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