adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 45

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

Serial Peripheral Interface Ports — Slave Timing
Table 30
Table 30. Serial Peripheral Interface (SPI) Ports—Slave Timing
Parameter
Timing Requirements
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
t
SPICHS
SPICLS
SPICLK
HDS
SPITDS
SDSCI
SSPID
DSOE
DSDHI
DDSPID
HDSPID
HSPID
and
CPHA=1
CPHA=0
Figure 26
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
(OUTPUT)
(INPUT)
(INPUT)
SCKx
SCKx
MISOx
MISOx
SPIxSS
(INPUT)
(INPUT)
(INPUT)
MOSIx
MOSIx
Serial Clock High Period
Serial Clock Low Period
Serial Clock Period
Last SCKx Edge to SPIxSS Not Asserted
Sequential Transfer Delay
SPIxSS Assertion to First SCKx Edge
Data Input Valid to SCKx Edge (Data Input Setup)
SCKx Sampling Edge to Data Input Invalid
SPIxSS Assertion to Data Out Active
SPIxSS Deassertion to Data High impedance
SCKx Edge to Data Out Valid (Data Out Delay)
SCKx Edge to Data Out Invalid (Data Out Hold)
describe SPI ports slave operations.
t
DSOE
t
DSOE
t
SDSCI
t
MSB VALID
t
t
DDSPID
t
SPICHS
SPICLS
SSPID
MSB VALID
Figure 26. Serial Peripheral Interface (SPI) Ports—Slave Timing
t
DDSPID
MSB
Rev. A | Page 45 of 60 | February 2008
t
t
MSB
SPICLS
SPICHS
t
HDSPID
t
HSPID
t
SSPID
t
LSB VALID
DDSPID
t
t
SPICLK
SSPID
LSB
LSB VALID
t
HSPID
ADSP-BF539/ADSP-BF539F
t
t
DSDHI
t
HDS
LSB
DSDHI
t
HSPID
Min
2t
2t
4t
2t
2t
2t
1.6
1.6
0
0
0
0
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
t
SPITDS
–1.5
–1.5
–1.5
–1.5
–1.5
–1.5
Max
8
8
10
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns