adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 35

• Manufacturer Part Number: adsp-bf539bbcz-5f8
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

SDRAM Interface Timing
Table 21. SDRAM Interface Timing
1
2
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
SDRAM timing for T
Command pins include: SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
SSDAT
HSDAT
SCLK
SCLKH
SCLKL
DCAD
HCAD
DSDAT
ENSDAT
DATA Setup Before CLKOUT
DATA Hold After CLKOUT
CLKOUT Period
CLKOUT Width High
CLKOUT Width Low
Command, ADDR, Data Delay After CLKOUT
Command, ADDR, Data Hold After CLKOUT
Data Disable After CLKOUT
Data Enable After CLKOUT
JUNCTION
CLKOUT
DATA (IN)
DATA(OUT)
CMND ADDR
= 125°C is limited to 100 MHz.
(OUT)
1
t
SSDAT
NOTE: COMMAND = SRAS, SCAS, SWE, SDQM, SMS, SA10, SCKE.
Rev. A | Page 35 of 60 | February 2008
Figure 16. SDRAM Interface Timing
2
2
t
DCAD
t
SCLK
t
t
ENSDAT
HSDAT
t
t
DCAD
HCAD
Min
2.1
0.8
7.5
2.5
2.5
0.8
1.0
t
SCLKL
ADSP-BF539/ADSP-BF539F
t
t
D SDA T
SCLKH
Max
6.0
6.0
t
HCAD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns