adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 37
adsp-bf539bbcz-5f8
Manufacturer Part Number
adsp-bf539bbcz-5f8
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-BF539BBCZ-5F8.pdf
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Table 23. External Port Bus Request and Grant Cycle Timing with Asynchronous BR
Parameter
Timing Requirement
t
Switching Characteristics
t
t
t
t
t
t
WBR
SD
SE
DBG
EBG
DBH
EBH
ARE
BR
AMSx
BGH
CLKOUT
ABE1-0
BG
ADDR19-1
AWE
BR Pulse Width
CLKOUT Low to AMSx, Address, and ARE/AWE Disable
CLKOUT Low to AMSx, Address, and ARE/AWE Enable
CLKOUT High to BG High Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH High Setup
CLKOUT High to BGH Deasserted Hold Time
Figure 18. External Port Bus Request and Grant Cycle Timing with Asynchronous BR
t
WBR
Rev. A | Page 37 of 60 | February 2008
t
t
t
SD
SD
SD
ADSP-BF539/ADSP-BF539F
t
t
DBG
DBH
Min
2
t
SCLK
t
t
EBG
EBH
Max
4.5
4.5
3.6
3.6
3.6
3.6
t
t
t
SE
SE
SE
Unit
ns
ns
ns
ns
ns
ns
ns
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