adsp-21532 ETC-unknow, adsp-21532 Datasheet - Page 13

• Manufacturer Part Number: adsp-21532
• Description: Blackfin Dsp
• Manufacturer: ETC-unknow

development tools, including Color Syntax Highlighting in
the VisualDSP++ editor. These capabilities permit pro-
grammers to:
• Control how the development tools process inputs and
• Maintain a one-to-one correspondence with the tool’s
The VisualDSP++ Kernel (VDK) incorporates scheduling
and resource management tailored specifically to address
the memory and timing constraints of DSP programming.
These capabilities enable engineers to develop code more
effectively, eliminating the need to start from the very begin-
ning, when developing new application code. The VDK
features include threads, critical and unscheduled regions,
semaphores, events, and device flags. The VDK also
supports priority-based, pre-emptive, cooperative and time-
sliced scheduling approaches. In addition, the VDK was
designed to be scalable. If the application does not use a
specific feature, the support code for that feature is excluded
from the target system.
Because the VDK is a library, a developer can decide
whether to use it or not. The VDK is integrated into the
VisualDSP++ development environment, but can also be
used with standard command-line tools. When the VDK is
used, the development environment assists the developer
with many error-prone tasks and assists in managing system
resources, automating the generation of various VDK based
objects, and visualizing the system state, when debugging
an application that uses the VDK.
Analog Devices’ DSP emulators use the IEEE 1149.1 JTAG
test access port of the ADSP-21532 to monitor and control
the target board processor during emulation. The emulator
provides full-speed emulation, allowing inspection and
modification of memory, registers, and processor stacks.
Nonintrusive in-circuit emulation is assured by the use of
the processor’s JTAG interface—the emulator does not
affect target system loading or timing.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the Blackfin DSP family.
Hardware tools include the ADSP-21532 EZ-Kit standal-
one evaluation/development cards. Third Party software
tools include DSP libraries, real-time operating systems,
and block diagram design tools.
Designing an Emulator-Compatible DSP Board
(Target)
The Analog Devices family of emulators are tools that every
DSP developer needs to test and debug hardware and
software systems. Analog Devices has supplied an IEEE
1149.1 JTAG Test Access Port (TAP) on the ADSP-21532.
The emulator uses the TAP to access the internal features
of the DSP, allowing the developer to load code, set break-
points, observe variables, observe memory, and examine
September 2001
generate outputs.
command line switches.
REV. PrA
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
PRELIMINARY TECHNICAL DATA
For current information contact Analog Devices at 800-262-5643
registers. The DSP must be halted to send data and
commands, but once an operation has been completed by
the emulator, the DSP system is set running at full speed
with no impact on system timing.
To use these emulators, the target’s design must include the
interface between an Analog Devices’ JTAG DSP and the
emulation header on a custom DSP target board.
Target Board Header
The emulator interface to an Analog Devices’ JTAG DSP
is a 14-pin header, as shown in
customer must supply this header on the target board in
order to communicate with the emulator. The interface
consists of a standard dual row 0.025" square post header,
set on 0.1"
0.235". Pin 3 is the key position used to prevent the pod
from being inserted backwards. This pin must be clipped
on the target board.
Also, the clearance (length, width, and height) around the
header must be considered. Leave a clearance of at least
0.15" and 0.10" around the length and width of the header,
and reserve a height clearance to attach and detach the pod
connector.
Figure 6. JTAG Target Board Connector for JTAG
Equipped Analog Devices DSP (Jumpers in Place)
As can be seen in
the header. There are the standard JTAG signals TMS,
TCK, TDI, TDO, TRST, and EMU used for emulation
purposes (via an emulator). There are also secondary JTAG
signals BTMS, BTCK, BTDI, and BTRST that are option-
ally used for board-level (boundary scan) testing.
When the emulator is not connected to this header, place
jumpers across BTMS, BTCK, BTRST, and BTDI as
shown in
correct state to allow the DSP to run free. Remove all the
jumpers when connecting the emulator to the JTAG header.
Figure
0.1" spacing, with a minimum post length of
KEY (NO PIN)
7. This holds the JTAG signals in the
Figure
BTRST
BTMS
BTCK
GND
BTDI
GND
6, there are two sets of signals on
TOP VIEW
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1
3
5
7
9
9
Figure 6 on page
14
10
12
2
4
6
8
ADSP-21532
EMU
GND
TMS
TCK
TRST
TDI
TDO
13. The
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