dac1205d750 NXP Semiconductors, dac1205d750 Datasheet - Page 39

• Manufacturer Part Number: dac1205d750
• Description: Dac1205d750 Dual 12-bit Dac, Up To 750 Msps; 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
13. Glossary
14. Revision history
Table 44.
DAC1205D750
Product data sheet
Document ID
DAC1205D750 v.2
Modifications:
DAC1205D750 v.1
Revision history
Spurious-Free Dynamic Range (SFDR): — The ratio between the RMS value of the
reconstructed output sine wave and the RMS value of the largest spurious observed
(harmonic and non-harmonic, excluding DC component) in the frequency domain.
Intermodulation Distortion (IMD): — From a dual-tone digital input sine wave (these
two frequencies being close together), the intermodulation distortion products IMD2 and
IMD3 (respectively, second and third-order components) are defined below.
IMD2 — The ratio of the RMS value of either tone to the RMS value of the worst second
order intermodulation product.
IMD3 — The ratio of the RMS value of either tone to the RMS value of the worst third
order intermodulation product.
Restricted Bandwidth Spurious Free Dynamic Range — The ratio of the RMS value of
the reconstructed output sine wave to the RMS value of the noise, including the
harmonics, in a given bandwidth centered around f
20100802
Release date
20100910
•
Figure
All information provided in this document is subject to legal disclaimers.
18: corrected the value of the resistors on pin AUXnP
Rev. 2 — 10 September 2010
Data sheet status
Product data sheet
Product data sheet
Dual 12-bit DAC, up to 750 Msps; 4× and 8× interpolating
offset
Change notice
-
-
.
DAC1205D750
DAC1205D750 v.1
Supersedes
-
© NXP B.V. 2010. All rights reserved.
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