dac1205d750 NXP Semiconductors, dac1205d750 Datasheet - Page 19

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dac1205d750

Manufacturer Part Number
dac1205d750
Description
Dac1205d750 Dual 12-bit Dac, Up To 750 Msps; 4? And 8? Interpolating
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
DAC1205D750
Product data sheet
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Default settings are shown highlighted.
Table 20.
Bit
7 to 0 FREQ_NCO[15:8]
Bit
7 to 0 FREQ_NCO[23:16]
Bit
7 to 0 FREQ_NCO[31:24]
Bit
7 to 0 PH_NCO[7:0]
Bit
7 to 0 PH_NCO[15:8]
Bit
7
6
5 to 1 DAC_A_OFFSET[4:0]
Bit
7 to 6 DAC_A_GAIN_
5 to 0 DAC_A_GAIN_
Symbol
Symbol
Symbol
Symbol
Symbol
Symbol
DAC_A_PD
DAC_A_SLEEP
Symbol
COARSE[1:0]
FINE[5:0]
FREQNCO_LISB register (address 04h) bit description
FREQNCO_UISB register (address 05h) bit description
FREQNCO_MSB register (address 06h) bit description
PHINCO_LSB register (address 07h) bit description
PHINCO_MSB register (address 08h) bit description
DAC_A_Cfg_1 register (address 09h) bit description
DAC_A_Cfg_2 register (address 0Ah) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 September 2010
Dual 12-bit DAC, up to 750 Msps; 4× and 8× interpolating
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
Access Value Description
R/W
R/W
R/W
Access Value Description
R/W
R/W
-
-
-
-
-
0
1
0
1
-
-
-
lower intermediate 8 bits for the NCO
frequency setting
upper intermediate 8 bits for the NCO
frequency setting
most significant 8 bits for the NCO frequency
setting
lower 8 bits for the NCO phase setting
most significant 8 bits for the NCO phase
setting
DAC A power
DAC A Sleep mode
lower 5 bits for the DAC A offset
lower 2 bits for the DAC A gain setting for
coarse adjustment
lower 6 bits for the DAC A gain setting for fine
adjustment
on
off
disabled
enabled
DAC1205D750
© NXP B.V. 2010. All rights reserved.
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