dac1205d750 NXP Semiconductors, dac1205d750 Datasheet - Page 29

• Manufacturer Part Number: dac1205d750
• Description: Dac1205d750 Dual 12-bit Dac, Up To 750 Msps; 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1205D750
Product data sheet
10.10.2 Full-scale current adjustment
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with GAP_PD (register 00h[0]; see
description”).
The default full-scale current (I
user to both DACs independently via the serial interface from 1.6 mA to 22 mA, ±10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (see
register (address 0Ah) bit description”
0Bh) bit
register (address 0Dh) bit description”
0Eh) bit
“I
Table 39.
Default settings are shown highlighted.
DAC_GAIN_COARSE[3:0]
Decimal
0
1
2
3
4
5
6
7
8
9
10
11
Fig 11. Internal reference configuration
O(fs)
coarse
description”) and to DAC_B_GAIN COARSE[3:0] (see
description”) define the coarse variation of the full-scale current (see
I
O(fs)
adjustment”).
coarse adjustment
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 September 2010
AGND
AGND
Dual 12-bit DAC, up to 750 Msps; 4× and 8× interpolating
Binary
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
O(fs)
100 nF
909 Ω
(1 %)
) is 20 mA but further adjustments can be made by the
Table 10 “COMMon register (address 00h) bit
and
and
GAPOUT
VIRES
Table 21 “DAC_A_Cfg_3 register (address
Table 24 “DAC_B_Cfg_3 register (address
BANDGAP
REF.
SOURCES
CURRENT
ARRAY
001aaj816
DAC
Table 20 “DAC_A_Cfg_2
DAC1205D750
I
1.6
3.0
4.4
5.8
7.2
8.6
10.0
11.4
12.8
14.2
15.6
17.0
O(fs)
Table 23 “DAC_B_Cfg_2
(mA)
© NXP B.V. 2010. All rights reserved.
Table 39
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