dac1205d750 NXP Semiconductors, dac1205d750 Datasheet - Page 10

• Manufacturer Part Number: dac1205d750
• Description: Dac1205d750 Dual 12-bit Dac, Up To 750 Msps; 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 5.
V
T
otherwise specified.
DAC1205D750
Product data sheet
Symbol
Clock inputs (CLKP and CLKN)
V
V
R
C
Clock outputs (SYNCP and SYNCN)
V
V
R
Digital inputs (I0 to I11, Q0 to Q11)
V
V
I
I
Digital inputs (SDO, SDIO, SCLK, SCS_N and RESET_N)
V
V
I
I
Analog outputs (IOUTAP, IOUTAN, IOUTBP and IOUTBN)
I
V
R
C
ΔE
ΔE
Reference voltage output (GAPOUT)
V
ΔV
I
Analog auxiliary outputs (AUXAP, AUXAN, AUXBP and AUXBN)
I
V
N
o
IL
IH
IL
IH
O(fs)
O(ref)
O(aux)
amb
DDA(1V8)
i
idth
o(cm)
O(dif)
IL
IH
IL
IH
O
O(ref)
O(aux)
i
i
o
o
o
DAC(aux)mon
O
G
O(ref)
=
−
40
= V
°
Characteristics
C to +85
DDD(1V8)
Parameter
input voltage
input differential threshold
voltage
input resistance
input capacitance
common mode output
voltage
differential output voltage
output resistance
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
LOW-level input voltage
HIGH-level input voltage
LOW-level input current
HIGH-level input current
full-scale output current
output voltage
output resistance
output capacitance
offset error variation
gain error variation
reference output voltage
reference output voltage
variation
reference output current
auxiliary output current
auxiliary output voltage
auxiliary DAC monotonicity guaranteed
= 1.8 V; V
°
C; typical values measured at T
…continued
DDA(3V3)
[2]
= V
All information provided in this document is subject to legal disclaimers.
V
V
register value = 00h
compliance range
external voltage 1.25 V D
Conditions
CLKN |V
CLKP
|V
V
V
default register
T
differential outputs
compliance range
DD(IO)(3V3)
amb
IL
IH
IL
IH
gpd
= 1.0 V
= 1.0 V
= 2.3 V
= 2.3 V
| < 50 mV
= 25 °C
Rev. 2 — 10 September 2010
gpd
= 3.3 V; AGND, DGND and GNDIO shorted together;
amb
| < 50 mV or
Dual 12-bit DAC, up to 750 Msps; 4× and 8× interpolating
= 25
°
C; R
Test
C
C
D
C
C
D
C
I
I
C
I
I
C
C
C
D
D
C
C
I
C
C
D
D
C
C
I
L
= 50
[1]
Ω
differential; I
[3]
[3]
-
-
2.3
2.3
-
1.8
-
-
-
-
0
-
Min
825
−100
-
-
-
GNDIO -
-
-
GNDIO -
-
-
-
-
1.2
-
-
O(fs)
DAC1205D750
Typ
-
-
10
0.5
V
1.2
80
-
60
80
-
20
20
1.6
20
-
250
3
6
18
1.25
117
40
2.2
-
10
0.3
DDA(1V8)
= 20 mA; PLL off unless
−
Max
1575
+100
-
-
-
-
-
1.0
V
-
-
1.0
V
-
-
-
-
V
-
-
-
-
1.30
-
-
-
2
-
© NXP B.V. 2010. All rights reserved.
DD(IO)(3V3)
DD(IO)(3V3)
DDA(3V3)
Unit
mV
mV
MΩ
pF
V
V
Ω
V
V
μA
μA
V
V
nA
nA
mA
mA
V
kΩ
pF
ppm/°C
ppm/°C
V
ppm/°C
μA
mA
V
bit
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