dac1205d750 NXP Semiconductors, dac1205d750 Datasheet - Page 17

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dac1205d750

Manufacturer Part Number
dac1205d750
Description
Dac1205d750 Dual 12-bit Dac, Up To 750 Msps; 4? And 8? Interpolating
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
DAC1205D750
Product data sheet
10.2.4 Detailed register descriptions
Please refer to
following tables, all the values shown in bold are the default values.
Table 10.
Default settings are shown highlighted.
Table 11.
Default settings are shown highlighted.
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
Symbol
NCO_ON
NCO_LP_SEL
INV_SIN_SEL
3W_SPI
SPI_RST
CLK_SEL
-
MODE_SEL
CODING
IC_PD
GAP_PD
Symbol
COMMon register (address 00h) bit description
TXCFG register (address 01h) bit description
Table 9
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 September 2010
for the register overview and relevant default values. In the
Dual 12-bit DAC, up to 750 Msps; 4× and 8× interpolating
R/W
R/W
R/W
Access Value Description
R/W
R/W
-
R/W
R/W
R/W
Access Value Description
R/W
R/W
0
1
0
1
0
1
-
0
1
0
1
0
1
0
1
0
1
0
1
0
1
low-power NCO
x / (sin x) function
NCO
serial interface bus type
serial interface reset
data input latch
reserved
input data mode
coding
power-down
internal bandgap power-down
disabled (the NCO phase is reset to 0)
enabled
disabled
NCO frequency and phase given by the five
MSBs of the registers 06h and 08h
respectively
disabled
enabled
4 wire SPI
3 wire SPI
no reset
performs a reset on all registers except 00h
at CLK rising edge
at CLK falling edge
dual port
interleaved
binary
two’s compliment
disabled
all circuits (digital and analog, except SPI)
are switched off
power-down disabled
internal bandgap references are switched off
DAC1205D750
© NXP B.V. 2010. All rights reserved.
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