upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 510

• Manufacturer Part Number: upd78f0114m6gb-8es
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

510
X1
oscillator,
subsystem
clock
oscillator
Prescaler
Ring-OSC
Main
clock
CPU
clock
Function
OSTS:
Oscillation
stabilization
time selection
register
Details of
Function
−
−
−
−
If the STOP mode is entered and then released while the Ring-OSC clock is being
used as the CPU clock, set the oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by
The X1 oscillation stabilization time counter counts up to the oscillation
stabilization time set by OSTS. Note, therefore, that only the status up to the
oscillation stabilization time set by OSTS is set to OSTC after STOP mode is
released.
The wait time when STOP mode is released does not include the time after STOP
mode release until clock oscillation starts (“a” below) regardless of whether STOP
mode is released by RESET input or interrupt generation.
To set the STOP mode while the X1 input clock is the CPU clock, set OSTS
before executing the STOP instruction.
Before setting OSTS, confirm that the oscillation stabilization time expected by
OSTS has elapsed.
When using the X1 oscillator and subsystem clock oscillator, wire as follows in the
area enclosed by the broken lines in Figures 5-8 and 5-9 to avoid an adverse
effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating
• Always make the ground point of the oscillator capacitor the same potential as
• Do not fetch signals from the oscillator.
Note that the subsystem clock oscillator is designed as a low-amplitude circuit for
reducing power consumption.
When the Ring-OSC clock is selected as the clock supplied to the CPU, the
prescaler generates various clocks by dividing the Ring-OSC oscillator output (f
240 kHz (TYP.)).
The RSTOP setting is valid only when “Can be stopped by software” is set for
Ring-OSC by a mask option.
To calculate the maximum time, set f
Selection of the CPU clock cycle division factor (PCC0 to PCC2) and switchover
from the X1 input clock to the subsystem clock (changing CSS from 0 to 1) should
not be set simultaneously.
Simultaneous setting is possible, however, for selection of the CPU clock cycle
division factor (PCC0 to PCC2) and switchover from the subsystem clock to the
X1 input clock (changing CSS from 1 to 0).
Setting the following values is prohibited when the CPU operates on the Ring-
OSC clock.
• CSS, PCC2, PCC1, PCC0 = 0, 0, 0, 1 (setting is enabled only for standard
• CSS, PCC2, PCC1, PCC0 = 0, 0, 1, 0
• CSS, PCC2, PCC1, PCC0 = 0, 0, 1, 1
• CSS, PCC2, PCC1, PCC0 = 0, 1, 0, 0
OSTS
current flows.
V
current flows.
products and (A) grade products)
SS
. Do not ground the capacitor to a ground pattern through which a high
APPENDIX D LIST OF CAUTIONS
User’s Manual U16227EJ3V0UD
Cautions
R
= 120 kHz.
X
=
p. 108
p. 108
p. 108
p. 108
p. 110
p. 112
p. 119
p. 120
p. 121
p. 121
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