upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 104

• Manufacturer Part Number: upd78f0114m6gb-8es
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(2) Ring-OSC mode register (RCM)
104
Notes 1.
The fastest instruction can be executed in 2 clocks of the CPU clock in the 78K0/KC1. Therefore, the relationship
between the CPU clock (f
This register sets the operation mode of Ring-OSC.
This register is valid when “Can be stopped by software” is set for Ring-OSC by a mask option, and the X1 input
clock or subsystem clock is selected as the CPU clock. If “Cannot be stopped” is selected for Ring-OSC by a
mask option, settings for this register are invalid.
RCM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
f
f
f
f
f
f
Address: FFA0H
X
X
X
X
X
XT
/2
/2
/2
/2
CPU Clock (f
/2
Symbol
2
3
4
RCM
2.
3.
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
The main clock mode register (MCM) is used to set the CPU clock (X1 input clock/Ring-OSC clock)
(see Figure 5-4).
Expanded-specification products of standard products and (A) grade products only
Setting is prohibited for the (A1) and (A2) grade products.
Caution Make sure that bit 1 (MCS) of the main clock mode register (MCM) is 1 before setting
CPU
RSTOP
)
7
0
0
1
After reset: 00H
0.2
0.4
0.8
1.6
3.2
RSTOP.
at 12 MHz Operation
µ
µ
µ
µ
µ
Ring-OSC oscillating
Ring-OSC stopped
CPU
Figure 5-3. Format of Ring-OSC Mode Register (RCM)
at 10 MHz Operation
s
s
s
s
s
X1 Input Clock
) and minimum instruction execution time is as shown in Table 5-2.
6
0
−
0.166
0.333
0.666
1.333
2.666
R/W
CHAPTER 5 CLOCK GENERATOR
Note 1
User’s Manual U16227EJ3V0UD
5
0
µ
µ
µ
µ
µ
Note 2
s
s
s
s
s
Minimum Instruction Execution Time: 2/f
8.3
16.6
Setting prohibited
Setting prohibited
Setting prohibited
(at 240 kHz (TYP.) Operation)
Ring-OSC oscillating/stopped
4
0
µ
µ
s (TYP.)
Ring-OSC Clock
s (TYP.)
Note 3
−
3
0
Note 1
2
0
122.1
CPU
(at 32.768 kHz Operation)
µ
Subsystem Clock
s
1
0
−
−
−
−
−
RSTOP
<0>