upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 131

• Manufacturer Part Number: upd78f0114m6gb-8es
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(3) 16-bit timer capture/compare register 010 (CR010)
Remarks 1. Setting ES001, ES000 = 1, 0 is prohibited.
Falling edge
Rising edge
Both rising and falling edges
CR010 is a 16-bit register that has the functions of both a capture register and a compare register. Whether it is
used as a capture register or a compare register is set by bit 2 (CRC002) of capture/compare control register 00
(CRC00).
CR010 can be set by a 16-bit memory manipulation instruction.
RESET input clears CR010 to 0000H.
• When CR010 is used as a compare register
• When CR010 is used as a capture register
Cautions 1. If the CR010 register is cleared to 0000H, an interrupt request (INTTM010) is generated when
The value set in CR010 is constantly compared with the 16-bit timer counter 00 (TM00) count value, and an
interrupt request (INTTM010) is generated if they match. The set value is held until CR010 is rewritten.
It is possible to select the valid edge of the TI000 pin as the capture trigger. The TI000 valid edge is set using
prescaler mode register 00 (PRM00) (see Table 6-3).
CR010 Capture Trigger
2. ES001, ES000: Bits 5 and 4 of prescaler mode register 00 (PRM00)
Address: FF14H, FF15H
Symbol
CR010
CRC002:
2. When CR010 is used as a capture register, read data is undefined if the register read time
3. CR010 can be rewritten during TM00 operation. For details, see Caution 2 in Figure 6-15.
Table 6-3. CR010 Capture Trigger and Valid Edge of TI000 Pin (CRC002 = 1)
the value changes from 0000H to 0001H after an overflow (FFFFH) of TM00. Moreover,
INTTM010 is generated after a match of TM00 and CR010, after the valid edge of the TI000
pin is detected, and after clearing by the one-shot trigger.
and capture trigger input conflict (the capture data itself is the correct value).
If count stop input and capture trigger input conflict, the captured data is undefined.
Figure 6-4. Format of 16-Bit Timer Capture/Compare Register 010 (CR010)
Bit 2 of capture/compare control register 00 (CRC00)
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
After reset: 0000H
FF15H
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U16227EJ3V0UD
R/W
TI000 Pin Valid Edge
FF14H
ES001
0
0
1
ES000
0
1
1
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