upd78f0114m6gb-8es Renesas Electronics Corporation., upd78f0114m6gb-8es Datasheet - Page 277

• Manufacturer Part Number: upd78f0114m6gb-8es
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(4) Clock selection register 6 (CKSR6)
Address: FF56H After reset: 00H R/W
Notes 1.
Symbol
CKSR6
This register selects the base clock of serial interface UART6.
CKSR6 can be set by an 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Remark CKSR6 can be refreshed (the same value is written) by software during a communication operation
2.
(when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5 (RXE6) of ASIM6
= 1).
Set the base clock to satisfy the following conditions.
• V
• V
• V
• V
When selecting the TM50 output as the base clock, note the following.
• PWM mode (TMC506 = 1)
• Mode in which clear & start occurs on a match of TM50 and CR50 (TMC506 = 0)
In both modes, it is not necessary to enable the timer output for the TO50 pin.
TPS63
Set the clock to 50% duty and start the 8-bit timer/event counter 50 operation beforehand.
Enable the timer F/F inversion operation (TMC501 = 1) and start the 8-bit timer/event counter 50
operation beforehand.
7
0
0
0
0
0
0
0
0
0
1
1
1
1
DD
DD
DD
DD
= 4.0 to 5.5 V: Base clock ≤ 10 MHz
= 3.3 to 4.0 V: Base clock ≤ 8.38 MHz
= 2.7 to 3.3 V: Base clock ≤ 5 MHz
= 2.5 to 2.7 V: Base clock ≤ 2.5 MHz
Figure 13-8. Format of Clock Selection Register 6 (CKSR6)
TPS62
Other than above
6
0
0
0
0
0
1
1
1
1
0
0
0
0
CHAPTER 13 SERIAL INTERFACE UART6
TPS61
5
0
0
0
1
1
0
0
1
1
0
0
1
1
User’s Manual U16227EJ3V0UD
TPS60
4
0
0
1
0
1
0
1
0
1
0
1
0
1
f
f
f
f
f
f
f
f
f
f
f
TM50 output
Setting prohibited
X
X
X
X
X
X
X
X
X
X
X
/2 (5 MHz)
/2
/2
/2
/2
/2
/2
/2
/2
/2
(10 MHz)
TPS63
2
3
4
5
6
7
8
9
10
(2.5 MHz)
(1.25 MHz)
(625 kHz)
(312.5 kHz)
(156.25 kHz)
(78.13 kHz)
(39.06 kHz)
(19.53 kHz)
(9.77 kHz)
3
Base clock (f
Note 2
TPS62
2
XCLK6
) selection
TPS61
1
Note 1
TPS60
0
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