XC2VP70 Xilinx, Inc., XC2VP70 Datasheet - Page 56

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XC2VP70

Manufacturer Part Number
XC2VP70
Description
Virtex-ii Pro Field Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet

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Virtex-II Pro Data Sheet
The Virtex-II Pro Data Sheet contains the following modules:
DS083-2 (v2.9) October 14, 2003
Advance Product Specification
05/27/03
06/02/03
08/25/03
09/10/03
10/14/03
Virtex-II Pro™ Platform FPGAs: Introduction and
Overview (Module 1)
Virtex-II Pro™ Platform FPGAs: Functional Description
(Module 2)
Date
R
Version
2.7.1
2.6
2.7
2.8
2.9
Removed Compatible Output Standards and Compatible Input Standards tables.
Added new
Output
Corrected sentence in section
optional weak-keeper circuit is connected to each user I/O pad.”
Added section
Added four Differential Termination I/O standards to
Added section
Added footnote referring to XAPP659 to 3.3V I/O callouts in
Section
be held to a constant DC level during and after configuration.
Deleted section
Sections
"falling" edge with respect to DOUT.
Table 3, page 13
1.08V to 1.1V.
Standards. This table replaces deleted I/O standards tables.
Configuration, page
Slave-Serial Mode
Table
Rules for Combining I/O Standards in the Same Bank, page
On-Chip Differential Termination
Power Sequencing, page
and
7,
www.xilinx.com
1-800-255-7778
Summary of Voltage Supply Requirements for All Input and
Table 5, page
Virtex-II Pro™ Platform FPGAs: Functional Description
and
43: Added text indicating that the mode pins M0-M2 must
Input/Output Individual Options, page
Virtex-II Pro™ Platform FPGAs: DC and Switching
Characteristics (Module 3)
Virtex-II Pro™ Platform FPGAs: Pinout Information
(Module 4)
Master-Serial Mode, page
14: Corrected Input V
Revision
6. Added section
and
Table 4
Figure 22, page
REF
Local Clocking, page
44: Changed "rising" to
and
Table 3
for HSTL_III-IV_18 from
Table
and
16, to read “The
23.
7.
Table
18.
7.
40.
47

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