XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 66

• Manufacturer Part Number: XC2VP20-6FF1152C
• Description: Pro Platform FPGA
• Manufacturer: Xilinx, Inc.

Virtex-II Pro Switching Characteristics
Table 21: Rocket I/O Receiver Switching Characteristics
66
Notes:
1.
2.
Receive total jitter tolerance
Receive deterministic jitter tolerance
Receive latency
RXUSRCLK duty cycle
RXUSRCLK2 duty cycle
Bit error rate
UI = Unit Interval
Receive latency delay from RXP/RXN to RXDATA
RXDATA[16:0]
RXUSRCLK2
RXP/RXN
Description
(2)
DATA ORIGINATES
0
1
2
. . . . .
Figure 2: Receive Latency (Maximum)
Symbol
T
T
T
T
T
RX2DC
BER
DJTOL
RXLAT
RXDC
20
JTOL
1
21 22
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1-800-255-7778
T
RXLAT
. . . . .
Conditions
820
821 822
41
. . . . .
Min
45
45
DS083-3 (v1.0) January 31, 2002
Advance Product Specification
840 841 842
Typ
25
50
50
42
DATA ARRIVES
DS083-3_02_082301
10
Max
0.65
0.41
42
55
55
. . . .
–12
RXUSR
Units
cycles
CLK
UI
UI
%
%
(1)
R